Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
A flexible FPGA based interface for use with one or more LVDTs
Jönköping University, School of Engineering, JTH, Department of Computer Science and Informatics.
2024 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesisAlternative title
Ett flexibelt FPGA-baserat gränssnitt mot en eller flera LVDTer (Swedish)
Abstract [en]

Computers are great at performing calculations and making decisions based on theresults of those calculations. In order to perform useful calculations based on theoutside world, computers need to be interfaced with sensors to be able to take ininformation. If the information of interest is the linear displacement of some entity, alinear variable differential transformer (LVDT) may be used. LVDTs use the principleof mutual induction in order to determine how far, and in which direction the entityhas been moved.This report describes the process, necessary theory and results of a study into theperformance achievable by a novel interface between an LVDT and a fieldprogrammable gate array (FPGA).The LVDT outputs two voltages, correlating to the position of an entity attached to theLVDT. These two voltages are passed into an analog to digital converter (ADC) whichconverts the voltage into a digital value which is then processed by the FPGA to givea single value which, again, relates to the position of an entity. The LVDT outputsalternating current (AC) signals but the experiments performed in the making of thisreport were performed using direct current (DC) signals. This was done due to thedesign not being capable of working with AC signals in time. Provided a goodmethod for dealing with AC signals is provided, the results of this study could stillprove valuable. The study used a signal generator to simulate the output of an LVDT.This was done partly to allow for more precise measurements but also to make theresults more generally applicable.The results of this study show that the novel interface provides a good accuracy andan improved bandwidth when compared to a currently used interface.

Place, publisher, year, edition, pages
2024. , p. 48
Keywords [en]
ADC, FPGA, LVDT, VHDL, XC7A35T, Xilinx, XADC
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:hj:diva-66073OAI: oai:DiVA.org:hj-66073DiVA, id: diva2:1893957
External cooperation
SAAB AB
Subject / course
JTH, Computer Engineering
Examiners
Available from: 2024-09-03 Created: 2024-09-01 Last updated: 2025-10-13Bibliographically approved

Open Access in DiVA

fulltext(2082 kB)264 downloads
File information
File name FULLTEXT01.pdfFile size 2082 kBChecksum SHA-512
96cda6a8ff577beaea3ac999089141ed6c5ecac211aed72eb9a0688d50b8443c96be80e486bfddab9836796732bb1831e70bea1a970d7eaf4de2e6f403fd3bde
Type fulltextMimetype application/pdf

By organisation
JTH, Department of Computer Science and Informatics
Embedded Systems

Search outside of DiVA

GoogleGoogle Scholar
Total: 267 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 544 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf